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Two Faculty Affiliates Named Fellows of IEEE

Published: January 7, 2016
Jiang Hu and Peng Li
Jiang Hu and Peng Li, professors in the Department of Electrical and Computer Engineering at Texas A&M University, have been named Fellows of IEEE.

Two Texas A&M Energy Institute Faculty Affiliates and professors in the Department of Electrical and Computer Engineering at Texas A&M University were named Fellows of the Institute of Electrical and Electronic Engineers (IEEE). Professors Jiang Hu and Peng Li were named IEEE Fellows for their research contributions.

IEEE Fellow is the highest grade of membership and is recognized by the technical community as a prestigious honor and an important career achievement. The IEEE grade of Fellow is conferred by the IEEE board of directors upon a person with an outstanding record of accomplishments in any of the IEEE fields of interest. The total number selected in any one year cannot exceed one-tenth of one percent of the total voting membership.

Hu was elected for contributions to gate, interconnect and clock network optimization in VLSI circuits and Li was elected for contributions to the analysis and modeling of integrated circuits and systems.

Jiang Hu

Digital VLSI chips, such as microprocessors and video decoders, are mostly composed by logic gates, which are connected by interconnect wires and synchronized by clock networks. Hu’s research accomplishments encompass all these three key elements. For gate optimizations he is a main contributor to the state-of-the-art solutions that address industrial challenges in nanometer VLSI technologies, including competing design objectives, complex models, non-ideal effects and huge problem sizes. Interconnect is a critical bottleneck to digital chip performance.

On interconnect optimization, Hu has produced large impact in both academia and industry. His research results have been applied on many industrial chip products, facilitating better chip performance, less chip power, shorter design turn-around time and solving difficult design cases. Hu is also highly recognized for his research on VLSI clock network optimization. Among many contributions, he pioneered the concept of cross-link, which greatly enhances clock network robustness with very high energy-efficiency, and inspired numerous follow-up research activities. Hu’s overall achievement is instrumental in shaping the course of VLSI optimization research and helping the VLSI industry tackle real world challenges.

Peng Li

Li obtained his Ph. D. in electrical and computer engineering from Carnegie Mellon University and joined the department in 2004. He has established expertise in electronic design automation, integrated circuits and systems, brain-inspired computing and aspects of computational neuroscience. In addition to his elevation to IEEE Fellow, his work has been recognized by various distinctions including four best paper awards from prestigious VLSI and EDA conferences, an NSF Career Award, four Inventor Recognition Awards from the Microelectronics Advanced Research Corporation and the Semiconductor Research Corporation. Li received the Best Paper Hat Trick Award, Prolific Author Award and Top 10 Author in Fifth Decade Award, all from the IEEE/ACM Design Automation Conference, the world’s premier VLSI technology conference.

Li’s former associates have obtained faculty and research positions in academia and industrial labs (Michigan Tech, Cornell Medical College/Cornell University, Intel Strategic CAD Laboratories) and research and development positions in the United States high-tech industry. He has brought his work to the real world through technology transfer and consulting for major semiconductor firms and startups.